mimo26: vLLM B12X A/B lane recipe + sglang 4x fp8-KV trial rollback

- mimo26-flash-mopd-4x-vllm: vLLM + B12X twin of the sglang 4x lane, no
  new image (r39 already carries MiMo-V2 + SWA/DFlash PR #46104); lil-catalog
  policy mirrored (BF16 KV, block 128, DFlash-7 via dflash/ subfolder, GMU
  0.84 per operator override of their 0.98).
- mimo26-flash-mopd-4x: fp8 KV rolled back to bfloat16 — flashinfer decode
  OOM'd the verify-graph capture (DFlash BF16 draft pool scales 1:1 with the
  fp8-inflated target pool), triton+fp8 boot stalled in cold NFS weight load.

Measured sweep (bf16 prod): d0 77.6 / 32K 57.8 / 131K 33.7 / 256K 23.5 t/s.

recipes/mimo26-flash-mopd-4x-vllm/recipe.toml

@@ -0,0 +1,110 @@
+# MiMo-V2.6-Flash-MOPD on 4x DGX Spark via vLLM + B12X — the engine A/B twin
+# of mimo26-flash-mopd-4x (SGLang). No new image: r39 already carries the
+# fork's MiMo-V2 integration (mimo_v2.py; SWA+DFlash PR #46104 merged into
+# the lab fork main 2026-07-01, present at the 9e5d1793 tag), so this lane
+# boots the SAME engine lineage our GLM-5.3 r39 lanes run — only the model
+# and the launch policy differ.
+#
+# Launch policy mirrors local-inference-lab's lil-catalog MiMo manifests
+# (MiMo-V2.6-Flash-RL TP4 qualified on SM120; Pro-MOPD TP8 with the DFlash
+# `dflash/` subfolder draft, BF16 draft weights, b12x noncausal sliding
+# attention). Deviations: GMU 0.88 -> 0.84 (operator call, GB10 UMA guard),
+# TP8 -> TP4 (our 4-node lane).
+#
+# What we are testing:
+#   * B12X attention long-context path on 192/128 GQA (the sglang-triton
+#     lane decodes at 30% of d0 at 256K; the lab's vLLM stack has the
+#     split-KV verify fix that fixed exactly this on their boxes).
+#   * BF16 KV @ GMU 0.84 (their cache policy — fp8 KV skipped on both stacks).
+#   * DFlash via vLLM speculative-config (method dflash, draft from the
+#     checkpoint's dflash/ subfolder, 7 draft tokens) vs sglang's DFlash.
+#
+# Status: first boot under qualification; the lab marks their MiMo DFlash
+# "implemented; runtime qualification unverified", same caveat here.
+
+engine = "vllm"
+name = "MiMo-V2.6-Flash-MOPD (vLLM B12X, 4x Spark, DFlash-7, r39)"
+docker_image = "jovian-judgement:r39-glm53"
+entrypoint = ["vllm", "serve"]
+model = "XiaomiMiMo/MiMo-V2.6-Flash-MOPD"
+parent_model = "XiaomiMiMo/MiMo-V2.6-Flash-MOPD"
+port = 30000
+required_nodes = 4
+tensor_parallel_size = 4
+pipeline_parallel_size = 1
+distributed_backend = "mp"
+shm_size = "32gb"
+
+args = [
+    "--served-model-name", "mimo-v2.6-flash",
+    "--trust-remote-code",
+    "--distributed-executor-backend", "mp",
+    # Operator GMU (0.88 -> 0.84 for this first vLLM MiMo boot); their
+    # manifest's 0.98 is RTX PRO 6000 territory, not GB10 UMA.
+    "--gpu-memory-utilization", "0.84",
+    "--block-size", "128",
+    "--max-model-len", "524288",
+    "--max-num-seqs", "4",
+    "--max-num-batched-tokens", "4096",
+    "--enable-chunked-prefill",
+    "--async-scheduling",
+    "--enable-prefix-caching",
+    # B12X attention (lab-qualified on MiMo's 192/128 heads) + their kernel
+    # config: no flashinfer autotune, no CuTe-DSL warmup.
+    "--attention-backend", "B12X",
+    "--load-format", "instanttensor",
+    "--kernel-config", """
+'{"enable_cutedsl_warmup":false,"enable_flashinfer_autotune":false}'""",
+    # DFlash draft from the checkpoint's dflash/ subfolder (7 tokens, B12X
+    # draft attention) — the vLLM mirror of the sglang lane's DFLASH flags.
+    "--speculative-config", """
+'{"method":"dflash","model":"{{dflash}}","num_speculative_tokens":7,"attention_backend":"B12X"}'""",
+    "--language-model-only",
+    "--reasoning-parser", "mimo",
+    "--tool-call-parser", "mimo",
+    "--enable-auto-tool-choice",
+    "--generation-config", "vllm",
+]
+
+# DFlash draft weights: a subfolder of the main model repo, resolved per node
+# (same mount as the sglang lane; {{dflash}} in the speculative config).
+[[extra_mounts]]
+repo = "XiaomiMiMo/MiMo-V2.6-Flash-MOPD"
+subfolder = "dflash"
+container = "dflash"
+
+# JIT caches: same per-node dirs the GLM r39 lane warms (b12x/flashinfer/
+# torchinductor/vllm), so this lane boots JIT-warm off day zero.
+[[extra_mounts]]
+host = "~/sm121-cache/glm53-jit-121f/b12x"
+container = "/root/.cache/b12x"
+
+[[extra_mounts]]
+host = "~/sm121-cache/jit-121f/flashinfer"
+container = "/root/.cache/flashinfer"
+
+[[extra_mounts]]
+host = "~/sm121-cache/jit-121f/torchinductor"
+container = "/root/.cache/torchinductor"
+
+[[extra_mounts]]
+host = "~/sm121-cache/jit-121f/vllm"
+container = "/root/.cache/vllm"
+
+[env]
+HF_HUB_OFFLINE = "1"
+VLLM_ENABLE_ROCE_ALLREDUCE = "1"
+MAX_JOBS = "2"
+VLLM_ENGINE_READY_TIMEOUT_S = "3600"
+PYTORCH_CUDA_ALLOC_CONF = "expandable_segments:True"
+VLLM_USE_AOT_COMPILE = "0"
+VLLM_USE_STANDALONE_COMPILE = "1"
+VLLM_USE_FLASHINFER_SAMPLER = "1"
+VLLM_USE_BREAKABLE_CUDAGRAPH = "0"
+TORCH_USE_RTLD_GLOBAL = "1"
+VLLM_NO_USAGE_STATS = "1"
+TORCH_CUDA_ARCH_LIST = "12.1a"
+FLASHINFER_CUDA_ARCH_LIST = "12.1f"
+CUTE_DSL_ARCH = "sm_121a"
+CMAKE_CUDA_ARCHITECTURES = "121"
+OMP_NUM_THREADS = "2"

recipes/mimo26-flash-mopd-4x/recipe.toml

@@ -45,6 +45,15 @@ args = [
     # Attention / MoE backends (same as the 2x lane)
     "--attention-backend", "triton",
     "--prefill-attention-backend", "fa4",
+    # Long-context decode trial (2026-09-28): decode falls to 30% of d0 at
+    # 256K — the 9 GA layers read KV linearly. Tried fp8 KV (+flashinfer
+    # decode) — flashinfer OOM-killed the verify-graph capture (the DFlash
+    # BF16 draft pool scales 1:1 with the fp8-inflated target pool, and
+    # capture had ~12 GB of headroom); the triton+fp8 boot stalled in a
+    # ~40 min cold NFS weight-load. Rolled back to the bf16 production
+    # shape. The lever is open again once the vLLM/b12x lane lands (their
+    # manifest also runs BF16 KV) or draft_kv_ratio/window shrink the draft.
+    "--kv-cache-dtype", "bfloat16",
     "--mm-attention-backend", "triton_attn",
     "--enable-multimodal",
     "--moe-runner-backend", "marlin",