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@@ -60,11 +60,16 @@ args = [
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"--distributed-executor-backend", "mp",
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# Operator GMU (0.88 -> 0.84 for this first vLLM MiMo boot); their
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# manifest's 0.98 is RTX PRO 6000 territory, not GB10 UMA.
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- "--gpu-memory-utilization", "0.84",
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+ "--gpu-memory-utilization", "0.85",
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"--block-size", "128",
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"--max-model-len", "524288",
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- "--max-num-seqs", "4",
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- "--max-num-batched-tokens", "4096",
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+ "--max-num-seqs", "16",
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+ "--max-num-batched-tokens", "8192",
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+ # SparkRing tp4 contract: deterministic 20 GiB KV pin (not auto-sizing),
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+ # bounce-buffer loader, c1/c8/c16 concurrency-friendly scheduler bounds.
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+ "--kv-cache-memory-bytes", "21474836480",
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+ "--model-loader-extra-config", """
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+'{"read_mode":"bounce","io_threads":8}'""",
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"--enable-chunked-prefill",
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"--async-scheduling",
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"--enable-prefix-caching",
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@@ -92,12 +97,16 @@ args = [
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# NOT spec-related: instanttensor mis-mapped the split-GDN weights; the
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# b12x loader fixed it (see --load-format comment).
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"--speculative-config", """
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-'{"method":"dflash","model":"{{dflash}}","num_speculative_tokens":7,"kv_cache_dtype":"auto","attention_backend":"B12X"}'""",
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+'{"method":"dflash","model":"{{dflash}}","num_speculative_tokens":5,"kv_cache_dtype":"bfloat16","attention_backend":"B12X","draft_load_config":{"load_format":"safetensors","model_loader_extra_config":{}}}'""",
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# (the --language-model-only line removed for boot B1 — see above)
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"--reasoning-parser", "mimo",
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"--tool-call-parser", "mimo",
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"--enable-auto-tool-choice",
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"--generation-config", "vllm",
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+ # SparkRing compile contract (fuse_act_quant + explicit capture sizes
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+ # sized for 16 seqs x (5+1) draft slots).
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+ "--compilation-config", """
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+'{"pass_config":{"fuse_act_quant":true},"cudagraph_mode":"FULL_AND_PIECEWISE","max_cudagraph_capture_size":96,"cudagraph_capture_sizes":[1,2,4,6,12,18,24,30,36,42,48,54,60,66,72,78,84,90,96]}'""",
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]
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# DFlash draft weights: a subfolder of the main model repo, resolved per node
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@@ -131,6 +140,17 @@ VLLM_PLUGINS = "b12x_loader"
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VLLM_ENABLE_ROCE_ALLREDUCE = "1"
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MAX_JOBS = "2"
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VLLM_ENGINE_READY_TIMEOUT_S = "3600"
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+# SparkRing tp4 serving-profile keys (quality flags from the DS4.1 garble
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+# line + b12x policy + v2 runner); NCCL transport stays on the switched
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+# cluster config — their switchless-ring keys are intentionally not ported.
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+VLLM_USE_V2_MODEL_RUNNER = "1"
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+VLLM_MXFP8_LM_HEAD = "0"
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+VLLM_LM_HEAD_A16 = "1"
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+VLLM_KV_CACHE_LAYOUT = "BLHNC"
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+B12X_POLICY_MODE = "auto"
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+VLLM_ROCE_ALLREDUCE_MAX_SIZE = "2097152"
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+VLLM_ROCE_ALLGATHER_MAX_SIZE = "16777216"
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+NCCL_IB_EXTENDED_IPV4_GIDS = "1"
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PYTORCH_CUDA_ALLOC_CONF = "expandable_segments:True"
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VLLM_USE_AOT_COMPILE = "0"
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VLLM_USE_STANDALONE_COMPILE = "1"
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