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@@ -105,6 +105,15 @@ failure mode this kills.
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layout-only ("no model math, scale precision, or output reduction is
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changed"), so 155 is inside the observed run-to-run band. Re-run queued to
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pin the variance before judging the stack.
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+- **Re-run: 159/176** — the 155 was variance, not a regression: 8 scenarios
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+ flipped between the two identical-stack runs (incl. TC-80/TC-88, which now
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+ PASS). Full r28 (155–159) and r27 (155–162) are statistically tied on
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+ quality; r28 wins on speed (median turn 3.0–3.3 s vs 3.9 s; TTFT ~3.6×
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+ better per the mixed run). **Full r28 stack = production candidate.**
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+ Also hardened startup: GMU 0.90 → 0.88 in all r27/r28 4x/2x recipes
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+ (ff1f727) so the `gpu_memory_utilization` admission gate (107.0 GiB, not
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+ 109.5) survives the ~12 GiB of starting vLLM processes on top of
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+ `drop_caches` (which already ran post-sync, pre-container, default on).
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Pending: (1) b12x O_DIRECT loader test (`--load-format b12x`, recipe
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`glm53-flash-r28-4x-dcp4-b12xload` ready) — the r28 b12x added
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