2026-10-02_225515_mimo2x-pluto.recipe.toml 9.8 KB

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  1. # MiMo-V2.6-Flash-MOPD on 2 nodes — SparkRing runtime stack, their qualified
  2. # profile `profiles/mimo-v26-flash-mopd-tp2` (topology direct-pair-2),
  3. # transcribed to sm121 form. INTENDED CLUSTER: `2nodes-dac` (dgx1+dgx2,
  4. # 192.168.100.x DAC pair — the nccl block routes over the f1 ports; verified
  5. # 2026-09-29 that the f1 GID table carries IPv4 RoCE-v2 at index 3).
  6. #
  7. # Deviations from their tp2 profile (same policies as our tp4 lane,
  8. # see specs/tech-architecture/sparkring-mimo-lanes.md):
  9. # * port 30000 (cluster default), launcher-generated rank/master flags;
  10. # * model from the mounted HF cache (same pinned snapshot 2479e2d0029e —
  11. # config/index sha verified against their profile);
  12. # * their 12 GiB `--kv-cache-memory-bytes` pin NOT adopted (auto pool;
  13. # at TP2 weights ≈ 87 GiB/rank leave ≈10-15 GiB auto ≈ 500-750K tokens,
  14. # plenty for 256K×c2 — operator policy: no pins);
  15. # * max-model-len 524288 (prod parity; the MML A/B on the c2 axis was
  16. # bit-identical — diagnosis of "c2 collapse" is in the lanes doc);
  17. # * NO Switchless/Ring machinery: HCA/GID/socket come from the cluster
  18. # nccl block (f1 pair); the ONE tp2-only transport key their profile
  19. # carries for the direct pair, `B12X_ROCE_PAIR_PATHS=2`, is kept.
  20. engine = "vllm"
  21. name = "MiMo-V2.6-Flash-MOPD (SparkRing installer image, 2x DAC pair)"
  22. docker_image = "ghcr.io/fujitsupolycom/sparkring@sha256:b01442df4e1496bea2f1339feb629eb61dc8175700c82b0e26abbcebd5b49567"
  23. entrypoint = ["python3", "/opt/sparkring/toolchain/toolchain.py", "serve"]
  24. # Floating model: the engine resolves the org/model id via the NAS HF cache
  25. # (refs/main -> latest snapshot; the flat snapshot dir carries dflash/ for the
  26. # draft loader). Their pin 2479e2d0 (profile config/index sha256 match) is
  27. # what refs/main points at on 2026-10-02 — informational only.
  28. model = "XiaomiMiMo/MiMo-V2.6-Flash-MOPD"
  29. parent_model = "XiaomiMiMo/MiMo-V2.6-Flash-MOPD"
  30. port = 30000
  31. required_nodes = 2
  32. tensor_parallel_size = 2
  33. pipeline_parallel_size = 1
  34. distributed_backend = "mp"
  35. shm_size = "32gb"
  36. devices = ["/dev/infiniband"]
  37. args = [
  38. "--served-model-name", "mimo-v2.6-flash",
  39. "--trust-remote-code",
  40. "--distributed-executor-backend", "mp",
  41. "--gpu-memory-utilization", "0.85",
  42. "--block-size", "128",
  43. # 524288 prod parity. (2026-09-29: the c2 "collapse" A/B at their 262144
  44. # was bit-identical — it later proved to be a BENCH artifact, not engine;
  45. # see specs/tech-architecture/sparkring-mimo-lanes.md.)
  46. "--max-model-len", "524288",
  47. "--max-num-seqs", "16",
  48. "--max-num-batched-tokens", "8192",
  49. "--model-loader-extra-config", """
  50. '{"read_mode":"bounce","io_threads":8}'""",
  51. "--enable-chunked-prefill",
  52. "--enable-prefix-caching",
  53. "--attention-backend", "B12X",
  54. "--linear-backend", "b12x",
  55. "--moe-backend", "b12x",
  56. "--no-enable-flashinfer-autotune",
  57. "--load-format", "b12x",
  58. "--kv-cache-dtype", "bfloat16",
  59. # NOTE: our nightly's `--kernel-config {enable_flashinfer_autotune:false}`
  60. # is mutually exclusive with their `--no-enable-flashinfer-autotune`
  61. # (ValueError at engine build) — their qualified shape wins, kernel-config
  62. # is dropped for this lane.
  63. # Their qualified multimodal shape: full Omni + data-parallel encoder
  64. # (this fork auto-falls back to weights for MiMo: "model does not support
  65. # --mm-encoder-tp-mode data"), per-prompt media limits, video kwargs,
  66. # pinned processor config.
  67. # Their qualified multimodal shape: full Omni + data-parallel encoder,
  68. # per-prompt media limits, video kwargs, pinned processor config.
  69. "--decode-context-parallel-size", "1",
  70. "--enable-prompt-tokens-details",
  71. "--limit-mm-per-prompt", """
  72. '{"image":3,"video":1,"audio":1}'""",
  73. "--mm-processor-cache-gb", "0",
  74. "--mm-encoder-tp-mode", "data",
  75. "--media-io-kwargs", """
  76. '{"video":{"num_frames":8}}'""",
  77. "--hf-overrides", """
  78. '{"architectures":["MiMoV2OmniForCausalLM"],"processor_config":{"audio_avg_pooler":2,"audio_channels":20,"audio_end_token_id":151674,"audio_fmax":null,"audio_fmin":0,"audio_group_size":4,"audio_hop_length":240,"audio_input_id_per_second":25.0,"audio_kernel_size":3,"audio_n_mels":128,"audio_nfft":960,"audio_sampling_rate":24000,"audio_segment_size":6000,"audio_start_token_id":151673,"audio_stride_size":2,"audio_token_id":151669,"audio_window_size":960,"audio_zeroemb_idx":[1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024,1024],"fps":1.0,"image_max_pixels":1048576,"image_min_pixels":8192,"image_token_id":151655,"max_frames":8,"merge_size":2,"min_frames":null,"num_frames":null,"pad_token_id":151643,"patch_size":16,"rope_type":"rope","temporal_compression_ratio":1,"temporal_patch_size":2,"use_per_grid_t_timestamps":false,"use_video_timestamps":true,"video_audio_interleave_length":0.0,"video_end_token_id":151671,"video_max_pixels":262144,"video_min_pixels":8192,"video_process_num_threads":16,"video_start_token_id":151670,"video_token_id":151656,"video_tokens_per_second":2,"video_total_max_pixels":268435456,"vision_end_token_id":151653,"vision_start_token_id":151652}}'""",
  79. # Draft: dflash/ inside the pinned snapshot (their /models/target/dflash).
  80. "--speculative-config", """
  81. '{"model":"{{dflash}}","method":"dflash","num_speculative_tokens":5,"draft_tensor_parallel_size":2,"kv_cache_dtype":"bfloat16","attention_backend":"B12X","draft_load_config":{"load_format":"safetensors","model_loader_extra_config":{}}}'""",
  82. "--compilation-config", """
  83. '{"pass_config":{"fuse_act_quant":true},"cudagraph_mode":"FULL_AND_PIECEWISE","max_cudagraph_capture_size":96,"cudagraph_capture_sizes":[1,2,4,6,12,18,24,30,36,42,48,54,60,66,72,78,84,90,96]}'""",
  84. "--reasoning-parser", "mimo",
  85. "--tool-call-parser", "mimo",
  86. "--enable-auto-tool-choice",
  87. "--generation-config", "vllm",
  88. ]
  89. # DFlash drafter: the dflash/ subfolder of the main model repo, resolved per
  90. # node via refs/main (floats with the model); substituted into the
  91. # speculative-config as {{dflash}}. No bind-mount — the HF cache is already
  92. # mounted at /root/.cache/huggingface.
  93. [[extra_mounts]]
  94. repo = "XiaomiMiMo/MiMo-V2.6-Flash-MOPD"
  95. subfolder = "dflash"
  96. container = "dflash"
  97. # One cache root for their /cache layout (eight *_CACHE_DIR keys below point
  98. # here; first boot warms JIT into it, the B12X selection-cache fix persists
  99. # across restarts — the single-mount story our nightly lane never had).
  100. [[extra_mounts]]
  101. host = "~/sm121-cache/sparkring-121f"
  102. container = "/cache"
  103. [env]
  104. # --- SparkRing compose environment, verbatim except the noted drops ------
  105. HF_HUB_OFFLINE = "1"
  106. TRANSFORMERS_OFFLINE = "1"
  107. VLLM_WORKER_MULTIPROC_METHOD = "spawn"
  108. PYTORCH_CUDA_ALLOC_CONF = "expandable_segments:True"
  109. OMP_NUM_THREADS = "16"
  110. MAX_JOBS = "16"
  111. VLLM_ENABLE_PCIE_ALLREDUCE = "0"
  112. VLLM_ENABLE_ROCE_ALLREDUCE = "1"
  113. VLLM_ROCE_ALLREDUCE_MAX_SIZE = "2097152"
  114. VLLM_ROCE_ALLGATHER_MAX_SIZE = "16777216"
  115. SPARKCACHE_ENABLED = "0"
  116. SOURCE_IMAGE_PROFILE = ""
  117. B12X_POLICY_MODE = "auto"
  118. # their tp2-only transport key: two parallel RoCE paths on the direct pair
  119. B12X_ROCE_PAIR_PATHS = "2"
  120. NCCL_NET = "IB"
  121. NCCL_NET_PLUGIN = "none"
  122. NCCL_IB_DISABLE = "0"
  123. NCCL_IB_EXTENDED_IPV4_GIDS = "1"
  124. NCCL_IB_MERGE_NICS = "0"
  125. NCCL_IB_PRESERVE_PCI_DOMAIN = "1"
  126. NCCL_IB_ROUTE_DIAGNOSTICS = "1"
  127. NCCL_IB_SUBNET_AWARE_ROUTING = "1"
  128. NCCL_IGNORE_CPU_AFFINITY = "1"
  129. NCCL_CROSS_NIC = "1"
  130. NCCL_ALGO = "Ring"
  131. NCCL_CUMEM_ENABLE = "0"
  132. NCCL_DEBUG = "WARN"
  133. NCCL_DEBUG_SUBSYS = "NET,INIT,GRAPH"
  134. NCCL_MAX_NCHANNELS = "4"
  135. NCCL_MIN_NCHANNELS = "4"
  136. NCCL_P2P_LEVEL = "SYS"
  137. NCCL_PROTO = "LL,LL128,Simple"
  138. NCCL_IB_GID_INDEX = "3"
  139. # Their bundled NCCL 2.32.3 (loader search tree inside the image).
  140. NCCL_ROOT = "/opt/sparkring/toolchain/nccl"
  141. NCCL_LIB_DIR = "/opt/sparkring/toolchain/nccl/lib"
  142. NCCL_INCLUDE_DIR = "/opt/sparkring/toolchain/nccl/include"
  143. NCCL_LOCAL_INFERENCE_PATH = "/opt/sparkring/toolchain/nccl/lib/libnccl.so.2"
  144. VLLM_NCCL_SO_PATH = "/opt/sparkring/toolchain/nccl/lib/libnccl.so.2"
  145. VLLM_NCCL_INCLUDE_PATH = "/opt/sparkring/toolchain/nccl/include"
  146. CUDA_HOME = "/usr/local/cuda-13.4"
  147. CUDA_PATH = "/usr/local/cuda-13.4"
  148. CUDA_VERSION = "13.4.2"
  149. VLLM_USE_V2_MODEL_RUNNER = "1"
  150. VLLM_MXFP8_LM_HEAD = "0"
  151. VLLM_LM_HEAD_A16 = "1"
  152. VLLM_B12X_MOE_FP4_FORCE_A16 = "0"
  153. VLLM_KV_CACHE_LAYOUT = "BLHNC"
  154. VLLM_PLUGINS = "b12x_loader,sparkring_status"
  155. # DIAGNOSIS CLOSED 2026-09-29: the c2 depth "collapse" was the bench's
  156. # own default (llama-benchy without --enable-prefix-caching serializes
  157. # cold 67K prefills per pair — artifact, not engine). DEBUG removed.
  158. B12X_ROCE_GID_INDEX = "3"
  159. SPARKRING_FEATURES = ""
  160. SPARKRING_TOOL_CHOICE_CONTRACT = "1"
  161. SIRCL_ENABLED = "0"
  162. VLLM_SPARK_TP4_MODE = ""
  163. VLLM_SPARK_TP4_VOCAB_MODE = ""
  164. # --- caches under /cache (compose names, verbatim) -----------------------
  165. XDG_CACHE_HOME = "/cache/mimo-v26-flash-rl-4b7049d1e00f-2479e2d0029e"
  166. VLLM_CACHE_ROOT = "/cache/mimo-v26-flash-rl-4b7049d1e00f-2479e2d0029e/vllm"
  167. TORCHINDUCTOR_CACHE_DIR = "/cache/mimo-v26-flash-rl-4b7049d1e00f-2479e2d0029e/inductor"
  168. TRITON_CACHE_DIR = "/cache/mimo-v26-flash-rl-4b7049d1e00f-2479e2d0029e/triton"
  169. CUTE_DSL_CACHE_DIR = "/cache/mimo-v26-flash-rl-4b7049d1e00f-2479e2d0029e/cute"
  170. TILELANG_CACHE_DIR = "/cache/mimo-v26-flash-rl-4b7049d1e00f-2479e2d0029e/tilelang"
  171. TVM_FFI_CACHE_DIR = "/cache/mimo-v26-flash-rl-4b7049d1e00f-2479e2d0029e/tvm-ffi"
  172. FLASHINFER_WORKSPACE_BASE = "/cache/mimo-v26-flash-rl-4b7049d1e00f-2479e2d0029e/flashinfer"
  173. B12X_COMPILE_CACHE_DIR = "/cache/mimo-v26-flash-rl-cuda13.4.2-2479e2d0029e/b12x"
  174. # --- launcher-controlled bits -------------------------------------------
  175. VLLM_ENGINE_READY_TIMEOUT_S = "3600"
  176. VLLM_NO_USAGE_STATS = "1"
  177. # DROPPED on purpose (see header): NCCL_SWITCHLESS_RING_ONLY,
  178. # B12X_ROCE_OPPOSITE_PATHS, B12X_ROCE_PEER_HCA_MAP, B12X_ROCE_HCA,
  179. # NCCL_IB_HCA (cluster block: f0 pair), NCCL_SOCKET_IFNAME/GLOO (cluster
  180. # block: enp1s0f0np0), SPARKRING_TRANSPORT_* (ring pacing), mem_limit.