recipe.toml 3.0 KB

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  1. # Qwen3.8-27B (unsloth NVFP4 + MTP) — 1× DGX Spark / GB10 (sm_121), TP=1.
  2. #
  3. # NVFP4 compressed-tensors quant (22 GB) with a separate MTP draft in
  4. # `model_mtp.safetensors`. Dense 27B, GQA, hybrid DeltaNet+Attention. Text +
  5. # vision. Unsloth Dynamic V3.0 (preview) quant — SOTA quality for NVFP4.
  6. # vLLM-only (lm_head FP8).
  7. #
  8. # Nearly identical to RedHatAI's NVFP4 build (qwen38-27b-nvfp4 recipe);
  9. # benchmark both to pick the faster / higher-quality one.
  10. #
  11. # Image: ghcr.io/timothystewart6/vllm-gb10:v0.27.1-gb10.2
  12. # vLLM 0.27.1, torch 2.13+cuda130, FlashInfer built from source,
  13. # instanttensor. Stock vLLM — supports the qwen3_5 arch + MTP.
  14. #
  15. # Model: unsloth/Qwen3.8-27B-NVFP4
  16. # https://huggingface.co/unsloth/Qwen3.8-27B-NVFP4
  17. #
  18. # PREREQUISITES:
  19. # Weights cached on every node (dgx1 ~/.cache/huggingface → NAS):
  20. # huggingface-cli download unsloth/Qwen3.8-27B-NVFP4
  21. #
  22. # REFERENCE:
  23. # https://forums.developer.nvidia.com/t/qwen3-8-27b-on-dual-sparks/380350
  24. # https://forums.developer.nvidia.com/t/qwen3-8-27b-nvfp4-on-a-single-dgx-spark-up-to-1m-context-vllm-mtp-measurements/380244
  25. # https://forums.developer.nvidia.com/t/qwen3-8-27b-mixedint4-autoround-optimized-for-a-single-dgx-spark/380248
  26. engine = "vllm"
  27. name = "Qwen3.8-27B (NVFP4, unsloth)"
  28. docker_image = "ghcr.io/timothystewart6/vllm-gb10:v0.27.1-gb10.2"
  29. model = "unsloth/Qwen3.8-27B-NVFP4"
  30. required_nodes = 1
  31. tensor_parallel_size = 1
  32. pipeline_parallel_size = 1
  33. distributed_backend = "mp"
  34. shm_size = "32gb"
  35. entrypoint = ["vllm", "serve"]
  36. args = [
  37. # KV cache & memory
  38. "--kv-cache-dtype", "fp8",
  39. "--max-model-len", "262144",
  40. "--max-num-seqs", "6",
  41. "--max-num-batched-tokens", "8192",
  42. "--gpu-memory-utilization", "0.75",
  43. "--served-model-name", "qwen3.8-27b",
  44. # Engine backends (dense GQA — FlashInfer; NVFP4 route via compressed-tensors)
  45. "--attention-backend", "flashinfer",
  46. # Compilation / perf
  47. "--optimization-level", "3",
  48. "--performance-mode", "throughput",
  49. # Chunked prefill + prefix caching
  50. "--enable-chunked-prefill",
  51. "--enable-prefix-caching",
  52. "--enable-flashinfer-autotune",
  53. # MTP speculative decoding (in-checkpoint draft, model_mtp.safetensors)
  54. "--speculative-config", """
  55. '{"method":"mtp","num_speculative_tokens":5}'""",
  56. # Tokenizer / reasoning (Qwen3 family)
  57. "--tool-call-parser", "qwen3_xml",
  58. "--reasoning-parser", "qwen3",
  59. "--enable-auto-tool-choice",
  60. "--generation-config", "auto",
  61. "--default-chat-template-kwargs.preserve_thinking=true",
  62. # Proven generation defaults (thinking mode; Qwen3.8 model-card best
  63. # practices)
  64. "--override-generation-config", """
  65. '{"temperature":1.0,"top_p":0.95,"top_k":20,"min_p":0.0,"presence_penalty":0.0,"repetition_penalty":1.0}'""",
  66. "--trust-remote-code",
  67. ]
  68. [env]
  69. HF_HUB_OFFLINE = "1"
  70. TORCH_CUDA_ARCH_LIST = "12.1a"
  71. CUTE_DSL_ARCH = "sm_121a"
  72. OMP_NUM_THREADS = "4"
  73. PYTORCH_CUDA_ALLOC_CONF = "expandable_segments:True"
  74. CUDA_VISIBLE_DEVICES = "0"
  75. CUDA_DEVICE_ORDER = "PCI_BUS_ID"
  76. CUDA_CACHE_MAXSIZE = "4294967296"