recipe.toml 4.8 KB

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  1. # MiMo-V2.6-Flash-MOPD (Xiaomi, ~310B total / 12B-active MoE, fp8 attention +
  2. # MXFP4 experts, 1M native context, image+video+audio input) on 2x DGX Spark
  3. # with SGLang + DFlash speculative decoding.
  4. #
  5. # SGLang variant of forum thread 383968 (tonyd2wild's proven vLLM 2x recipe:
  6. # 45.6/155.8 t/s, 1.87M-token fp8 KV pool, 300K ctx, code 70.5 t/s). The
  7. # vLLM recipe needed 4 drop-in patches; the biggest (fused fp8 QKV stored
  8. # pre-sharded for TP4) is already handled natively by SGLang's MiMo-V2
  9. # loader (same approach as vllm#57508 — the provenance of the 8x Pro recipe
  10. # working on this image family), so we run the stock a14 image.
  11. #
  12. # Image: docker-images/mimo26-spark (a14) — same build as the 8x Pro recipe:
  13. # SGLang 06008c17 base + 12 patches (MiMo-V2 day-0, DFlash, RoCEnante, FP8
  14. # tiles) + b12x. The FP8 tile tables are tuned for MiMo's per-rank shapes —
  15. # at TP2 the shapes differ from TP8; stock fallbacks apply if a tile misses.
  16. #
  17. # Model: XiaomiMiMo/MiMo-V2.6-Flash-MOPD (178 GB, same architecture as the
  18. # RL sibling — config.json is byte-identical; MOPD is a post-RL preference
  19. # distillation of the checkpoint). Resolved from the shared NAS hub
  20. # (config hf_cache_dir; both nodes' ~/.cache/huggingface point there). The
  21. # dflash/ subfolder carries the DFlash draft weights — wired as a
  22. # {{dflash}} path ref.
  23. #
  24. # KV math: ~89 GB weights/rank (178 GB / TP2), GMU 0.85 of 128 GB → the pool
  25. # lands ~6 GB under the RL sibling's 362,560 tokens (measured there
  26. # 2026-09-27); expect ~300–340K. Quality/perf of the RL lane
  27. # (recipes/mimo26-flash-rl-2x/reports, 161/184 on v2.7.1.dev7) is the
  28. # comparison baseline until this lane has its own bench.
  29. engine = "sglang"
  30. name = "MiMo-V2.6-Flash-MOPD (SGLang DFlash, 2x Spark TP2)"
  31. docker_image = "mimo26-spark:a14"
  32. docker_image_dir = "mimo26-spark"
  33. model = "XiaomiMiMo/MiMo-V2.6-Flash-MOPD"
  34. parent_model = "XiaomiMiMo/MiMo-V2.6-Flash-MOPD"
  35. port = 30000
  36. required_nodes = 2
  37. tensor_parallel_size = 2
  38. distributed_backend = "mp"
  39. shm_size = "16gb"
  40. entrypoint = ["python3", "-m", "sglang.launch_server"]
  41. args = [
  42. "--trust-remote-code",
  43. "--served-model-name", "mimo-v2.6-flash",
  44. # Attention / MoE backends (a13/a14 profile, same as the 8x Pro recipe)
  45. "--attention-backend", "triton",
  46. "--prefill-attention-backend", "fa4",
  47. "--mm-attention-backend", "triton_attn",
  48. "--enable-multimodal",
  49. "--moe-runner-backend", "marlin",
  50. "--moe-a2a-backend", "none",
  51. # Memory / scheduling (128 GB unified per node). Config C (2026-09-28):
  52. # 0.88 → 0.90 for the 512K target — pool at 0.88 was 481,600, short of
  53. # 524,288 by ~43K tokens. Measured: pool grows ~50K tokens per 1 GB of
  54. # static budget (~1.9 GB per 0.01 GMU), so 0.90 should land ~530-600K.
  55. # Activation headroom after static at 0.90: ~11 GB/node — same regime as
  56. # the 0.85 boots where long prefills never OOM'd.
  57. "--mem-fraction-static", "0.90",
  58. # Model is natively 1M; the measured pool at GMU 0.85 is 340,736 tokens
  59. # (2x TP2: 83 GB weights/rank leaves ~25 GB/rank; 39/48 SWA layers keep it
  60. # large in tokens). 320K fits a single long request with headroom; a
  61. # 524K request is pool-infeasible on 2x (the 8x Pro lane runs 512K).
  62. "--context-length", "524288",
  63. "--max-running-requests", "8",
  64. "--chunked-prefill-size", "8192",
  65. "--page-size", "64",
  66. # MiMo hybrid SWA attention
  67. "--swa-full-tokens-ratio", "0.1",
  68. # Reasoning / tool parsers
  69. "--reasoning-parser", "mimo",
  70. "--tool-call-parser", "mimo",
  71. # DFlash speculative decoding (draft weights ship inside the model repo)
  72. "--speculative-algorithm", "DFLASH",
  73. "--speculative-draft-model-path", "{{dflash}}",
  74. "--speculative-num-draft-tokens", "8",
  75. # CUDA graphs
  76. "--cuda-graph-max-bs-decode", "8",
  77. "--disable-prefill-cuda-graph",
  78. # Unified memory: page cache from weight loading competes with the KV pool
  79. "--weight-loader-drop-cache-after-load",
  80. # Observability
  81. "--enable-metrics",
  82. "--enable-cache-report",
  83. "--watchdog-timeout", "1800",
  84. ]
  85. # DFlash draft weights: a subfolder of the main model repo, resolved per node
  86. # (table header — all bare keys above).
  87. [[extra_mounts]]
  88. repo = "XiaomiMiMo/MiMo-V2.6-Flash-MOPD"
  89. subfolder = "dflash"
  90. container = "dflash"
  91. [env]
  92. # NOTE: SGLANG8_ROCE_ALLREDUCE is deliberately NOT set — the RoCEnante
  93. # one-shot all-reduce overlay in the a14 image hard-requires the TP8 Gloo
  94. # exchange group ("SG17 RoCEnante requires the TP8 Gloo exchange group"),
  95. # so on TP2 we fall back to stock NCCL over the DAC link.
  96. # a13/a14 tuning switches
  97. MIMO26_FP8_OPROJ = "1"
  98. MIMO26_FP8_DRAFT = "1"
  99. MIMO26_DFLASH_ADAPTIVE = "1"
  100. # NCCL extras from the reference deployment (HCAs/ifname from [nccl."2nodes-dac"])
  101. NCCL_CUMEM_ENABLE = "0"
  102. NCCL_NVLS_ENABLE = "0"
  103. NCCL_PROTO = "^LL128"
  104. NCCL_BUFFSIZE = "1048576"
  105. NCCL_LL128_BUFFSIZE = "262144"
  106. NCCL_MAX_NCHANNELS = "8"
  107. NCCL_DEBUG = "WARN"