recipe.toml 12 KB

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  1. # RoCEnante A/B arm B — IDENTICAL to glm53-flash-r27-4x-dcp4 (arm A, NCCL
  2. # control) except the single env toggle below: VLLM_ENABLE_ROCE_ALLREDUCE=1.
  3. # The r27 image already carries b12x.comm.roce (PR #295 merge + two-rail
  4. # striping + PR #315) and the vLLM adapter — see specs/tech-architecture/
  5. # glm53-recipe-state.md (RoCEnante section). B12X_ROCE_HCA/GID_INDEX fall back
  6. # to NCCL_IB_HCA/NCCL_IB_GID_INDEX (both already injected by the launcher).
  7. # 4nodes-switch only (needs the CX-7 200 GbE RoCE fabric, both rails).
  8. # r27 4x DCP4 cell — clone of the r18 4x-dcp4 recipe (2026-09-05, 161/176,
  9. # KV 4.84M @ 16 GiB) retargeted at the r27 engine (2026-09-07 night, all 4
  10. # nodes free after the pluto switch). Same model/flags/KV pin.
  11. # GLM-5.3-Flash NVFP4 — local-inference-lab quant (vLLM) — 2× DGX Spark, TP=2.
  12. #
  13. # local-inference-lab mixed quant: NVFP4 routed experts (layers 3–44,
  14. # group-16) + MXFP8 MTP experts (layer 45) + W4A4 input scales. Best agent
  15. # quant so far: tool-eval-bench 89/100 (vs 85 LibertAIDAI, 90 official FP8).
  16. # Model: https://huggingface.co/local-inference-lab/GLM-5.3-Flash-NVFP4
  17. # (~186 GB → 92.72 GiB weights/node; KV pinned at 10 GiB, see below)
  18. #
  19. # Image: glm53-flash-nvfp4-lab:local (docker-images/glm53-flash-nvfp4-lab/ —
  20. # day-0 arm64 image + NoPE-MLA mod + the four FujitsuPolycom lab-checkpoint
  21. # patches: model naming shim, modelopt MTP namespace fix, persistent_topk
  22. # CC-12.x guards). Their launch config is mirrored below.
  23. # PROVENANCE: https://github.com/FujitsuPolycom/glm53-flash-tp2-spark
  24. # (Apache-2.0; see patches/UPSTREAM.md) + forum 381350 #41.
  25. #
  26. # Deviations from their launch script (intentional):
  27. # * no --kda-prefill-backend flashkda (needs their base-image patch — skipped)
  28. # * --kv-cache-dtype fp8_ds_mla instead of `fp8` (same packed layout; this
  29. # spelling is what the NoPE-MLA mod booted with on the LibertAIDAI stack)
  30. # * --language-model-only + no mm-renderer patch/env (text-only)
  31. # * no bundled NCCL/LD_PRELOAD, no NCCL_* fabric block (our switched fabric
  32. # is configured via [nccl.ds4] + launcher GID auto-detect)
  33. # * no --moe-backend marlin: their proven stack uses the default backend for
  34. # THIS quant and reports clean evals. Sanity-check output for token loops
  35. # anyway (the silent FP4 MoE corruption gotcha) before trusting a new node.
  36. # * flashinfer autotune disabled via --kernel-config (their proven boot);
  37. # VLLM_ENGINE_READY_TIMEOUT_S stays high regardless.
  38. #
  39. # Boot success markers (engine log, in order):
  40. # "Model loading took 92.72 GiB" → "[quantprobe] ... algo=MXFP8" (MTP fix
  41. # active; algo=None means broken) → "GPU KV cache size: 1,164,369 tokens" →
  42. # "Application startup complete". ~700 s sequential weight load.
  43. #
  44. # Test request: chat completions need "chat_template_kwargs":{"reasoning_effort"
  45. # :"low"} — omitted/other values select MAX reasoning effort (empty content on
  46. # short max_tokens).
  47. #
  48. # Optional: instanttensor loader (~30 s weight load vs ~700 s):
  49. # FROM glm53-flash-nvfp4-lab:local + pip install --no-deps --no-build-isolation
  50. # instanttensor==0.1.9, then add --load-format instanttensor (--no-deps is
  51. # required: resolution would downgrade the image's NCCL).
  52. #
  53. # PREREQUISITES: weights cached on both nodes:
  54. # [A/B CELL 2026-09-03] ship recipe verbatim, checkpoint swapped to the lab
  55. # non-Spark NVFP4 (isolates checkpoint from image lineage vs the lab-image cell).
  56. # [BISECT A2 2026-09-03] EXACT 90/100 recipe (236ce5a) + instanttensor + JIT
  57. # mounts, on the CURRENT eugr-patched image. Isolates image lineage from the
  58. # execution-env/flag cluster (AOT/V2/b12x/card-env). Comparator: 124/138.
  59. # GLM-5.3-Flash NVFP4-Spark — local-inference-lab quant with the speculative
  60. # layers embedded — 2× DGX Spark, TP=2.
  61. #
  62. # local-inference-lab/GLM-5.3-Flash-NVFP4-Spark (rev 06972cdee7280cec849aedf05a02062b3e870246):
  63. # NVFP4 routed experts (layers 3+, group-16) + NVFP4 MTP expert layer in the
  64. # separate model-mtp-0000x.safetensors shards (mtp_tokens: 5 per their
  65. # lil.yaml), amax/nonexpert/inputscales side shards, Glm5NextForConditionalGeneration.
  66. # THE "DSpark speculative embedded" checkpoint — no separate DFlash2 download
  67. # needed; lil.yaml: default_speculator mtp, dflash2_tokens 7 (r12 doc fr: their
  68. # standalone-Q: MTP:3 254 tok/s CC1, 333 Sieve, 94 steps/s).
  69. #
  70. # Image: glm53-flash-nvfp4-lab:local (same proven day-0 arm64 stack + NoPE-MLA
  71. # mod + modelopt MTP namespace patch used by the 92/100 lab lane). The MTP
  72. # layer here is NVFP4 (not MXFP8) — the quantprobe marker may print
  73. # algo=NVFP4/- different; algo=None = patch missed (fall back to 4p67 image).
  74. #
  75. # Deviations from lab (unchanged mechanics): same fabric/env/GMU/KV pinning.
  76. # lil.yaml launch mirrors: block 256, disable_flashinfer_autotune, mm data
  77. # mode — our text-only flags identical to glm53-flash-nvfp4-lab.
  78. #
  79. # Boot markers: "Model loading took ~XX GiB" → "[quantprobe] ..." →
  80. # "GPU KV cache size" → "Application startup complete".
  81. #
  82. # PREREQUISITES: weights on the NAS hub (175 GiB): hf download local-inference-lab/GLM-5.3-Flash-NVFP4-Spark
  83. engine = "vllm"
  84. name = "GLM-5.3-Flash NVFP4 (r27 img, lab ckpt, 4x DCP4)"
  85. docker_image = "glm53-jovian-r27:local" # r27 clone-at-pin build (docker-images/glm53-jovian-r27)
  86. docker_image_dir = "glm53-jovian-r27"
  87. # Required: the clean r12 image follows the solar contract (ENTRYPOINT []
  88. # + CMD bash), so the recipe carries the entrypoint (the old day-0-based
  89. # r12 image had ["vllm","serve"] baked in, which is why this was absent
  90. # until the clean rebuild).
  91. entrypoint = ["vllm", "serve"]
  92. model = "local-inference-lab/GLM-5.3-Flash-NVFP4"
  93. required_nodes = 4
  94. tensor_parallel_size = 4
  95. pipeline_parallel_size = 1
  96. distributed_backend = "mp"
  97. shm_size = "32gb"
  98. args = [
  99. # Stable served name — quant-agnostic (shared across glm53 quants)
  100. "--served-model-name", "glm53",
  101. "--trust-remote-code",
  102. "--distributed-executor-backend", "mp",
  103. # GMU is ONLY a startup guardrail here (KV pool is pinned below): 0.90
  104. # demands 109.46 GiB free on GB10's 121.63 GiB, but driver reserve +
  105. # page cache routinely leave ~108.5 -> flaky
  106. # "Free memory ... less than desired" boot deaths (this was the class
  107. # of the old "54-second death"), and post-crash reruns see ~106.6 GiB.
  108. # 0.82 = 99.7 GiB, below any realistic dip; does NOT change what gets
  109. # allocated (weights ~93 + pinned KV 10 + activations).
  110. "--gpu-memory-utilization", "0.90",
  111. # Pinned 10 GiB KV (≈1.16M tokens) — GMU sizing has no headroom at
  112. # 92.72 GiB weights/node; pinning also keeps warmup off the swap path
  113. "--kv-cache-memory-bytes", "17179869184", # 16 GiB: 4x NVFP4 has the headroom (47.1 GiB weights/node vs 108 usable); 2x stays 10
  114. "--decode-context-parallel-size", "4",
  115. "--cp-kv-cache-interleave-size", "4",
  116. # No --kv-cache-dtype: let the r12 fork pick its default (the explicit
  117. # fp8 / fp8_ds_mla both failed auto-selection on this build).
  118. # The GLM5Next model wires the B12X sparse-MLA backend (sm_120/sm_121)
  119. # when the global backend is B12X (glm5next/nvidia/attention.py:
  120. # _select_sparse_backend); the sm12x auto-priority list never offers it
  121. # (FLASHINFER_MLA_SPARSE_SM120 only supports head 576, not GLM's 512).
  122. "--attention-backend", "B12X",
  123. # pure I/O loader (kept across every config; 171 GB in ~5.5 min vs ~16 NFS)
  124. "--load-format", "instanttensor",
  125. # [R17 FULL-CLUSTER TEST] lil manifest backends (quality gate: hardmode
  126. # must stay ≥88; r12-era this cluster dropped it to 74 — r17 may carry
  127. # the fix through — one boot decides).
  128. "--block-size", "256",
  129. # FINAL BISECT (2026-09-03, hardmode 176pt, r17 img):
  130. # knobs-only 87: d0 c1 24.1, d8192 23.8
  131. # +moe b12x 88: d0 c1 23.5, d8192 26.6 <- SHIP (2 pts d8192)
  132. # +linear b12x 44: W4A4 linear kernel destroys numerics (param-precision 0%)
  133. # +align 88: but d0 c1 18.6 (-5) — perf-negative, dropped
  134. # (all three together = 44-74; the lab needs its private packed package)
  135. "--max-model-len", "524288",
  136. "--max-num-seqs", "16",
  137. "--max-num-batched-tokens", "4096",
  138. "--enable-chunked-prefill",
  139. "--async-scheduling",
  140. "--enable-prefix-caching",
  141. # NO --disable-custom-all-reduce here (arm A keeps it): in the r27 fork the
  142. # RoCEnante adapter is gated on the custom-all-reduce enable flag
  143. # (use_roce_allreduce = use_custom_allreduce && VLLM_ENABLE_ROCE_ALLREDUCE).
  144. # On a 4x 1-GPU-node cluster vLLM's own CUDA-IPC custom AR is functionally
  145. # inert (no cross-node P2P), so dropping the flag only opens the b12x path;
  146. # the b12x-PCIe branch stays off (VLLM_ENABLE_PCIE_ALLREDUCE defaults False).
  147. # Their proven boot: no flashinfer autotune, no CuTe-DSL warmup
  148. "--kernel-config", """
  149. '{"enable_cutedsl_warmup":false,"enable_flashinfer_autotune":false}'""",
  150. # Built-in MTP draft, 3 tokens (the r12-qualified "mtp:3" mode — their
  151. # x86 numbers: 254 tok/s CC1, 2.37 accept; the checkpoint embeds up to
  152. # 5 via the model-mtp-0000x shards but 3 is the verified depth). This is
  153. # the checkpoint's own MTP head (Glm5NextMTPModel), NOT dspark — dspark
  154. # is the DeepSeek-V4 family's mechanism; GLM's other r12 mode is
  155. # dflash2:7 with a separate trained draft checkpoint.
  156. # The draft model's vllm_config takes its attention backend from the
  157. # SPECULATIVE config, not the global flag (eagle/utils.py:
  158. # _make_eagle_draft_vllm_config) — B12X here mirrors the main model's.
  159. "--speculative-config", """
  160. '{"method":"mtp","num_speculative_tokens":3,"attention_backend":"B12X"}'""",
  161. "--language-model-only",
  162. # MTP + CUDA graphs degrades OUTPUT QUALITY on the glm53 day-0 dev build
  163. # (forum #381350/#44, CONFIRMED by A/B bench 2026-08-28: same seed/flags,
  164. # graphs on = 89/100, eager = 92/100; decode unchanged 28.4 t/s @ c1,
  165. # c2 -7%, TTFT +1.6s). The b12x glm52 stack does NOT need this (its
  166. # graphs+MTP combo benches clean at 100/100) — bug is build-specific.
  167. # graphs moved BEFORE tool-call-parser; enforce-eager removed for the
  168. # r17-graphs test (bisect A2 was 88/100 eager; graphs+MTP fix is public
  169. # in r17 refs? verify by bench).
  170. "--tool-call-parser", "glm47",
  171. "--enable-auto-tool-choice",
  172. "--reasoning-parser", "glm45",
  173. ]
  174. [env]
  175. HF_HUB_OFFLINE = "1"
  176. # RoCEnante toggle (b12x.comm.roce one-shot RoCE all-reduce/all-gather):
  177. # routes eligible TP decode collectives off NCCL (2 MB AR / 16 MB AG caps;
  178. # prefill's large all-reduces stay on NCCL). Proxy .so builds at first use
  179. # (gcc + libibverbs verified in the image) into /root/.cache/b12x/roce
  180. # (persisted via the b12x cache mount).
  181. VLLM_ENABLE_ROCE_ALLREDUCE = "1"
  182. # FlashInfer JIT (mxfp8_gemm_cutlass_sm120, ~12 kernels) compiles at first
  183. # boot with 12 parallel nvcc jobs -> OOM-killed (code 137) on GB10's
  184. # 121 GB unified while the 93 GB weights + 10 GB KV pin are resident.
  185. # MAX_JOBS caps ninja parallelism so the JIT fits in the remaining ~20 GB.
  186. MAX_JOBS = "2"
  187. # NoPE-MLA rope-pad runtime gate (mod baked into the image)
  188. VLLM_MLA_NOPE_PAD_ROPE = "1"
  189. VLLM_ENGINE_READY_TIMEOUT_S = "3600"
  190. # Upstream launch-script env (memory + compile knobs)
  191. PYTORCH_CUDA_ALLOC_CONF = "expandable_segments:True"
  192. VLLM_USE_AOT_COMPILE = "0"
  193. VLLM_USE_STANDALONE_COMPILE = "1"
  194. VLLM_USE_FLASHINFER_SAMPLER = "1"
  195. VLLM_USE_BREAKABLE_CUDAGRAPH = "0"
  196. TORCH_USE_RTLD_GLOBAL = "1"
  197. VLLM_NO_USAGE_STATS = "1"
  198. # Architecture (aarch64 / sm_121a DGX Spark)
  199. TORCH_CUDA_ARCH_LIST = "12.1a"
  200. FLASHINFER_CUDA_ARCH_LIST = "12.1f"
  201. CUTE_DSL_ARCH = "sm_121a"
  202. CMAKE_CUDA_ARCHITECTURES = "121"
  203. OMP_NUM_THREADS = "2"
  204. [[extra_mounts]]
  205. host = "~/sm121-cache/glm53-jit-121f/b12x"
  206. container = "/root/.cache/b12x"
  207. # JIT caches persist per-node across serves (was: cold /root/.cache per
  208. # container -> ~20 min flashinfer/torch recompile every serve). The host
  209. # dirs are shared between lanes of the same arch — each cache
  210. # self-namespaces by its engine version key internally.
  211. [[extra_mounts]]
  212. host = "~/sm121-cache/jit-121f/flashinfer"
  213. container = "/root/.cache/flashinfer"
  214. [[extra_mounts]]
  215. host = "~/sm121-cache/jit-121f/torchinductor"
  216. container = "/root/.cache/torchinductor"
  217. [[extra_mounts]]
  218. host = "~/sm121-cache/jit-121f/vllm"
  219. container = "/root/.cache/vllm"