Operator plan (before start): "максимальная смена" — first update-check of all sources, then 2x window (eugr + sparkring), morning: Aiden image re-check, r31 back to production, dgx5 power-off consideration.
production-1.1 at 16:54 UTC (Docker Hub) — the event
of the shift. Pulled to all 4 nodes + dgx5 (23.4 GB, digest ede55d46).main is 338 commits ahead of our pin e47aa780 (09-10, "[Model]
Support DeepSeek-V4.1-Flash", still not on main) and DSV4 fixes started
flowing into main (2 today: indexer gather kernel, dflash attention
padding) → next-rebase campaign material.feat(sm120): runtime KV row stride + canonical 528B
GLM53_NOPE rows + NaN-safe masked gather — candidate for the GLM lanes.r33-arm64-c8646b0 tag (R33 TP4/DCP4 SparkCache
profile) + the memory-guard rebuild we needed tonight:
glm53-shared-8b32ef2 = digest 4774a7c5 (confirmed via ghcr digest
lookup; glm53-shared-74275757 = f25cdb6 = our current pin).2026-09-11_223443_eugr-2x-0910)2026-09-11_235045_...)ghcr.io/fujitsupolycom/sparkring:glm53-shared-8b32ef2
(= 4774a7c5, the 2 GB memory-guard rebuild) to dgx1+dgx2.13720ae): the new image's b12x
loader JIT-compiles its native module at first boot and the linker cannot
find libcudart (the old image prebaked it). Verified the fix in a
scratch container: LIBRARY_PATH=/usr/local/cuda/lib64 (+ CUDA_HOME),
plus a persistent B12X_CACHE_DIR mount so the compile survives reboots.2026-09-12_003640_aiden11-dcp2-0912)Image internals (verified on dgx5): vllm 0.28.1rc1.dev388+g8a728663c (base
vllm/vllm-openai:nightly-8a728663, not our e47aa780 pin) + b12x 1.3.0 +
FI 0.7.0rc1 + torch 2.13.0+cu130; the 24-file DCP2 patch set is baked
(manifest at /opt/dsv41-dcp2-mounts.txt) + FI source with
trtllm_dcp_alltoall.cu / cake_dcp.py. DCP env defaults are OFF
(DSV41_DCP_STAGE=3, DCP_COMBINE=ag_rs, DCP_PREFILL_GATHER=0,
ENGRAM_MMAP/PREFETCH=0); CLI: --decode-context-parallel-size 2
(-dcp), --dcp-comm-backend {ag_rs|a2a}.
Recipe dsv41-flash-4x-aiden11 = their DCP2 core (TP4 + dcp=2 + a2a + 8 GiB
pinned KV, their validated 300K row) on our serving config (DSpark k=5
exact capture, SEQS 8, thinking+max, engram-local, deepseek-v4-flash alias).
Worker_TP0_DCP0, weights 48/48 in 92 s (warm NFS),
"DSA indexer: DCP2 with compress_ratio=2 (state-sharded K cache)",
CUDA graphs 11 s, KV 2,518,386 tokens @ 300K (better than their
claimed 1.89M), 8.39× 300K concurrency.docker cp of the manifest's targets) if the operator ever wants DCP2
on our clone-at-pin tree — no need to wait for Aiden's file dump.glm53-flash-r31-4x-dcp4 (4nodes-switch) — restarted as
morning prod per operator plan.dsv41-flash-4x-b12x recipe + images on all
nodes + engram-local copies; Aiden 1.1 image on all 4 nodes for re-runs.glm53-flash-r35-4x-dcp4 (4nodes-switch, promoted 09-12
per operator decision — r35 stays; r31 recipe remains as the rollback
lane, image tagged on all nodes).production-1.2 on Hub (DCP2-1.2 with the launcher env values) —
re-check; the 1.1 A/B already answers the direction.main (338 commits
ahead of our pin) — re-pin + re-patch when the branch stabilizes.r33-arm64-c8646b0 (R33 profile) — if the reliability story
ever changes.swiglu-reviewed-
composition-r35.source.lock): full 3-fork cut — vLLM de982a50 (tree
6d5cc349), b12x 98086604 (tree d963f030), LMCache 29bc5a2e (tree
5a88a1ea). All pins verified fetchable + tree-matched; build-dep set
r31↔r35 identical (no fetch-deps resync). profiles/glm53-r35.env +
recipe glm53-flash-r35-4x-dcp4.8bb87348), boot gates green
(vllm string 0.1.dev0+glm53.r35.de982a50, b12x/lmcache/flashkda OK);
pre-transferred dgx5→dgx1 (docker save|ssh, ~11 min) before the window.Recipe glm53-flash-r35-4x-dflash2 (clone of the r35 MTP3 prod, ONLY the
speculative-config swapped: MTP3 → {"method":"dflash","model":"...DFlash2-MXFP8",
"num_speculative_tokens":7,"kv_cache_dtype":"auto"}). No build, no download:
the r35 image ships the DFlash2 machinery (DFlash2DraftModel, dedicated
dflash_attn graph-safe split-KV backend, FlashInferCutlassMxfp8LinearKernel
for the fused draft K/V projection) and the 1.2 GB MXFP8 draft was already on
the shared NAS.
Boot gates green: Resolved architecture: DFlash2DraftModel, method=dflash
K7, and — the 08-29 blocker is DEAD — the r35 tree pads the mamba page size
(+0.70%) so draft/target page geometry unifies instead of the old
4096 % 660 != 0 abort. KV: 6,333,399 tokens @512K (12.08x) vs MTP3's
8,060,928 — the draft's 5 sliding-attention layers + BF16 draft pages eat part
of the 16 GiB pin.
| r35 MTP3 (prod, 11:31) | r35 DFlash2 K7 (22:20) | |
|---|---|---|
| score (dev65, seed 42) | 163/176 (93) | 165/176 (94) |
| pp / tg / TTFT, d0 c1 | 1,554 / 49.6 / 1,544 ms | 1,977 / 47.3 / 1,071 ms |
| pp / tg, d0 c2 | 1,489 / 53.0 | 1,475 / 55.8 |
| KV | 8.06M tokens | 6.33M tokens |
Same harness both runs (clean A/B). Prefill +27%, TTFT −31%,
decode −4.6% @c1 / +5.3% @c2, score +2 (TC-40/50/63 now pass; new partials
TC-60 + one more; shared fails TC-43/45/51/68). The run package (manifest +
recipe copy, the 081a0e6 feature) landed on its first live run; found and
fixed a utc_now_iso bug in the same commit (civil_date got seconds, produced
year 4900778).
Verdict (operator, 09-12 night): the DFlash2 lane is the better 4x config on
this bench — but the operator keeps r35 MTP3 as prod for now (the day's
decision) and logs DFlash2 as the 4x candidate: +2 points, big TTFT/prefill
gain, −22% KV (6.3M vs 8.06M — matters for the 512K concurrency story).
Restore path: sm121 stop + serve the MTP3 recipe.
glm53-flash-r35-2x-dflash2 (r31-2x shape, r35 image, NVFP4-Spark target,
same draft). First attempt (bare TP2, no DCP): both ranks abort 5 min into
boot with ValueError: GLM MLA parent-page stride must be an exact number of
C4 pages — the r35-tree successor of the 08-29 page-unification blocker.
Second attempt (+DCP2, interleave 2): ValueError: GLM C4 DCP requires
cp_kv_cache_interleave_size to be divisible by 4, got 2. The interleave must
be a multiple of 4 → the only working DFlash2 shapes are the lab's certified
TP4/DCP1 and TP4/DCP4 (4x only). This matches the lab's qualification
exactly (their 2x Spark profile is MTP3-only). 2x stays MTP3; DFlash2 is
a 4x-only lane on this tree. The recipe is kept as a regression canary
(BLOCKED notes in the file).
Ops note: sm121's docker run carries --rm by default — a crashed rank-0
container vanished with its logs. sm121 serve --keep suppresses --rm
and was used for the second attempt (logs survived, root cause captured).
Cluster 4nodes-switch powered off via HA after the A/Bs (prod state: down until the next serve; MTP3 r35 = prod of record, DFlash2 = candidate).
The lab published their FIRST DS4.1 lock (09-12): image
jovian-judgement-community-20260912-r36 (vLLM 202a11a98e / JJ b40673cd +
#738/#740, b12x 323107ff with DS4.1 native kernels, LMCache 29bc5a2e,
FlashKDA 3b225bf2, DeepGEMM 8b1392b9, FI 0.6.17, + liburing 2.5 for the
Engram disk-mode io_uring reads). DS4.1 profile: TP4/DCP1, native DSpark K7
greedy + standard rejection + adaptive verification (draft inside the
checkpoint), B12X attn/MoE/linear, 131K ctx, 4 seqs / 4096 batched, block
256, FULL_AND_PIECEWISE ≤128, Engram RAM(188.83 GiB)/disk. Their RTX quartet
numbers: 32K prefill ~14K t/s, C1 244–261 t/s.
We built the same source composition for GB10 (the r35 build dir + new
profile jovian-r36-ds41, docker-images/glm53-jovian-r27):
B12X_PCIE_ONESHOT_PDL no longer exists in b12x 323107ff (gate updated to
_PREPARED_ONESHOT_LAUNCHERS, same file).RuntimeError: io_uring PLE support is unavailable: install liburing
development headers and pkg-config, then rebuild the b12x native loader.
The b12x loader is C sources (_ple_reader.c et al.) compiled at RUNTIME
by b12x/loader/_native.py (cc, -Werror, liburing optional via
pkg-config probe) — the image needs liburing-dev (headers), not just the
liburing2 runtime lib. Build 3 (13m47s) with both: OK.49b368a0): DSpark K7 SpeculativeConfig(method='dspark', num_spec_tokens=7),
EngramConfig(table_memory='disk') (no io_uring error), KV 3,377,679
tokens (25.77x @131K), Application startup complete, smoke "четыре" ✅.
One engine warning: "torch.compile is turned on, but the model ... does
not support it" — the DS4.1 model class lacks @support_torch_compile in
the r36 tree (true for their RTX runs too; piecewise cudagraphs, not
inductor fusion).A/B vs the current dsv41 prod (eugr image, DSpark K5 probabilistic, same dev65 harness/seed, 4nodes-switch):
| dsv41 prod (eugr) | lab r36 (this run) | |
|---|---|---|
| score | 167/176 (95) | 158/176 (90) |
| pp / tg / TTFT @d0 c1 | 1,642 / 47.0 / 1,738 ms | 401 / 33.7 / 5,061 ms |
| tg @d4096 c2 | (b12x lane 1,642/47 anchor) | 12.0 |
| KV | 512K pin | 3.38M @131K |
Verdict: r36 is a clear loser on GB10 — prefill 4.1x slower, TTFT 3x
worse, decode −28%, quality −9. Prime suspect for the prefill collapse: the
Engram PLE reader's io_uring row reads over our NFS (their RTX runs use a
local NVMe checkpoint; 510 GB won't fit our 132 GB local free space),
compounded by RTX-tuned scheduler/compile settings (131K ctx, 4 seqs, block
256, DCP1). The lab's stack is optimized for the RTX PRO 6000 (1.8 TB/s
GDDR7); on GB10 the eugr lane stays production. Follow-ups (in order of
value): (1) diagnose the Engram read path (log PLE read latency; try the
r36 stack with our prod scheduler flags — 512K, DCP4, block 128, seqs 8 —
to separate storage from tuning); (2) wait for the lab's sm_121 port if
they ever tune for Spark; (3) the built image jovian-r36-ds41:local
(label 49b6...) + recipe dsv41-flash-jovian-r36-4x stay in the repo as a
known-working (losing) lane.