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+# Qwen3.8-Flash-Next (NVFP4, SGLang) — 2× DGX Spark / GB10 (sm_121), TP=2.
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+#
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+# Qwen4-architecture preview: 176B total (6B active) GDN + QSA hybrid MoE,
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+# 512 routed experts (top-10) + shared expert, 51B n-gram "engram" table
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+# (PLE, offloaded to host RAM), in-checkpoint MTP draft. Text + vision.
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+# Native 262144 ctx (YaRN to 1M). Always-thinking.
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+#
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+# QUANT: NVFP4 (RadixArk), NOT the official FP8. FP8 cannot serve on 2×
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+# Spark: its MoE weight_block_size=[128,128] + moe_intermediate_size=640
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+# violates SGLang's (intermediate/tp) % block_n == 0 at tp=2 (sgl-project/
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+# sglang #21810) — only tp in {1,5} align, and tp=1 can't hold 125B. NVFP4
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+# is the community-verified 2× Spark path. SGLang's own cookbook lists the
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+# FP8 quant's supported HW as H200/B200/B300/GB300 — not GB10.
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+#
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+# Image: qwen38-flashnext-nvfp4:local — built by the launcher from
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+# docker-images/qwen38-flashnext-nvfp4/ (base lmsysorg/sglang:qwen38flashnext
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+# + a SM121 QSA decode kernel fix). The stock day-0 image cannot serve
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+# qwen4_exp on GB10: QSA's packed varlen decode resolves to flash-attn-4
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+# CuTe-DSL kernels that fail MLIR compilation on SM121; the overlay swaps in
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+# a CUDA-graph-safe Triton fallback. Provenance/validation:
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+# https://github.com/MiaAI-Lab/Qwen3.8-Flash-Next-Dual-DGX-Sparks
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+#
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+# Model: RadixArk/Qwen3.8-Flash-Next-NVFP4 (~135 GB)
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+# https://huggingface.co/RadixArk/Qwen3.8-Flash-Next-NVFP4
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+#
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+# REFERENCE:
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+# https://forums.developer.nvidia.com/t/qwen3-8-flash-next/381228
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+
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+engine = "sglang"
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+name = "Qwen3.8-Flash-Next NVFP4 (SGLang, 2× Spark)"
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+docker_image = "qwen38-flashnext-nvfp4:local"
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+docker_image_dir = "qwen38-flashnext-nvfp4"
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+model = "RadixArk/Qwen3.8-Flash-Next-NVFP4"
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+parent_model = "Qwen/Qwen3.8-Flash-Next"
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+required_nodes = 2
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+tensor_parallel_size = 2
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+pipeline_parallel_size = 1
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+distributed_backend = "mp"
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+shm_size = "32gb"
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+
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+entrypoint = ["python3", "-m", "sglang.launch_server"]
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+
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+args = [
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+ # Stable served name — quant-agnostic, shared with qwen38-flash-next-fp8 so
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+ # swapping quants never changes what agents/clients pin against.
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+ "--served-model-name", "qwen3.8-flash-next",
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+ "--trust-remote-code",
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+ # NVFP4 (ModelOpt) weights
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+ "--quantization", "modelopt_fp4",
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+ # flashinfer is required on SM120/SM121 (trtllm_mha is SM100-only)
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+ "--attention-backend", "flashinfer",
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+ # page 64 is pinned by SGLang for compressed QSA (full//ratio addressing)
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+ "--page-size", "64",
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+ # GDN (DeltaNet) hybrid state pool
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+ "--mamba-ssm-dtype", "bfloat16",
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+ "--mamba-radix-cache-strategy", "extra_buffer",
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+ "--mamba-track-interval", "64",
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+ # Memory — 0.70 leaves DRAM for the ~26 GB/rank pinned PLE (engram) table
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+ "--mem-fraction-static", "0.70",
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+ "--chunked-prefill-size", "4096",
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+ "--max-running-requests", "16",
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+ "--context-length", "262144",
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+ # NEXTN speculative decoding — draft = the in-checkpoint MTP layer
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+ "--speculative-algorithm", "NEXTN",
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+ "--speculative-num-steps", "3",
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+ "--speculative-eagle-topk", "1",
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+ "--speculative-num-draft-tokens", "4",
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+ # Parsers (auto = resolve from the checkpoint chat template)
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+ "--reasoning-parser", "auto",
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+ "--tool-call-parser", "auto",
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+ "--allow-auto-truncate",
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+ # Observability
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+ "--enable-metrics",
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+ "--enable-cache-report",
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+ # SM121 house rule: prefill CUDA graphs unreliable on GB10
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+ "--disable-prefill-cuda-graph",
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+ # Pin decode-graph batch list (default list OOMs the graph pool on GB10)
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+ "--cuda-graph-bs-decode", "1", "2", "3", "4", "5", "6", "7", "8", "10", "12", "14", "16",
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+]
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+
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+[env]
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+# Offline — weights must be cached on each node
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+HF_HUB_OFFLINE = "1"
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+TRANSFORMERS_OFFLINE = "1"
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+
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+# Architecture (aarch64 / sm_121a DGX Spark)
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+TORCH_CUDA_ARCH_LIST = "12.1a"
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+FLASHINFER_CUDA_ARCH_LIST = "12.1a"
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+CUTE_DSL_ARCH = "sm_121a"
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+OMP_NUM_THREADS = "4"
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